Professor, Electrical and Computer Engineering, Volgenau
Building: Nguyen Engineering Building
Mail Stop: 1G5
Dimitri Ioannou has authored or coauthored over two hundred and fifty research papers and conference presentations and advised more than thirty research students. His main research contributions include: development of techniques for using scanning electron microscopy (SEM) and Electron-beam-induced current (EBIC) to detect and characterize defects in semiconductor materials; techniques for studying deep traps, carrier lifetime and interface states in Silicon on Insulator (SOI) substrates; physics and hot carrier reliability of SOI devices, including the discovery of the opposite-channel based carrier-injection and invented an SOI flash memory cell that exploits this phenomenon; development of Schottky and Ohmic contact technology for SiC. His current research interests are on the performance and reliability issues of SOI and bulk CMOS devices and circuits (radiation hardness, hot carriers, negative bias temperature instability, electrostatic discharge protection), and on non-classical (nano-scale) CMOS and the emerging field of nanoelectronics, including nanowire-based non-volatile memory. Ioannou has been involved with the IEEE Intern SOI Conference for over fifteen years, including as technical program chairman (SOI’2001) and general chairman (SOI’2002). He is the 2008 Outstanding Research Faculty Award Recipient of the George Mason University Volgenau School of Engineering. He is a Fellow of the IEEE, and in recognition of the importance of his research to the semiconductor industry, he is a two-time recipient of the IBM faculty award.
2014 - 2017 : Glassy-polymer Electret Random Access Memory (GeRAM). Funded by National Institute of Standards and Technology.
2014 - 2016 : Manufacture Large-Area Two-Dimensional Semiconductor Materials for Portable, Flexible and Transparent Electronics. Funded by Center for Innovative Technology.
2012 - 2015 : Reliability Characterization of State-of-the-art High-kmetal Gate CMOS Devices. Funded by National Institute of Standards and Technology.
- PhD, Solid-State Electronics, Manchester University
- MS, Solid-State Electronics, Manchester University
- BS, Physics, Thessaloniki University